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I/O Section
2.2 I/O Section
Addresses $0000–$004F, shown in Figure 2-2, contain the I/O Data, Status, and Control Registers.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
$000C
$000D
$000E
$000F
Register Name
Port A Data Register
(PTA)
Port B Data Register
(PTB)
Port C Data Register
(PTC)
Port D Data Register
(PTD)
Data Direction Register A
(DDRA)
Data Direction Register B
(DDRB)
Data Direction Register C
(DDRC)
Data Direction Register D
(DDRD)
Port E Data Register
(PTE)
Port F Data Register
(PTF)
Port G Data Register
(PTG)
Port H Data Register
(PTH)
Data Direction Register E
(DDRE)
Data Direction Register F
(DDRF)
Data Direction Register G
(DDRG)
Data Direction Register H
(DDRH)
Bit 7
Read:
PTA7
Write:
Read:
PTB7
Write:
Read: 0
Write: R
Read:
PTD7
Write:
Read:
DDRA7
Write:
Read:
DDRB7
Write:
Read:
MCLKEN
Write:
Read:
DDRD7
Write:
Read:
PTE7
Write:
Read: 0
Write: R
Read: 0
Write: R
Read: 0
Write: R
Read:
DDRE7
Write:
Read: 0
Write: R
Read: 0
Write: R
Read: 0
Write: R
6
PTA6
PTB6
0
R
PTD6
DDRA6
DDRB6
0
R
DDRD6
PTE6
PTF6
0
R
0
R
DDRE6
DDRF6
0
R
0
R
5
PTA5
PTB5
PTC5
PTD5
DDRA5
DDRB5
DDRC5
DDRD5
PTE5
PTF5
0
R
0
R
DDRE5
DDRF5
0
R
0
R
4
PTA4
PTB4
PTC4
PTD4
DDRA4
DDRB4
DDRC4
DDRD4
PTE4
PTF4
0
R
0
R
DDRE4
DDRF4
0
R
0
R
3
PTA3
PTB3
PTC3
PTD3
DDRA3
DDRB3
DDRC3
DDRD3
PTE3
PTF3
0
R
0
R
DDRE3
DDRF3
0
R
0
R
2
PTA2
PTB2
PTC2
PTD2
DDRA2
DDRB2
DDRC2
DDR2
PTE2
PTF2
PTG2
0
R
DDRE2
DDRF2
DDRG2
0
R
1
PTA1
PTB1
PTC1
PTD1
DDRA1
DDRB1
DDRC1
DDRD1
PTE1
PTF1
PTG1
PTH1
DDRE1
DDRF1
DDRG1
DDRH1
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
DDRB0
DDRC0
DDRD0
PTE0
PTF0
PTG0
PTH0
DDRE0
DDRF0
DDRG0
DDRH0
= Unimplemented
R
= Reserved
Figure 2-2. I/O Data, Status and Control Registers (Sheet 1 of 5)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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