UM10430 Datasheet, PDF (967/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

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1
WAKEUP1_EN A 1 in this bit shows that the WAKEUP1 event has been
0
enabled. This event wakes up the chip and contributes to the
event router interrupt when bit 0 = 1 in the STATUS register.
2
WAKEUP2_EN A 1 in this bit shows that the WAKEUP2 event has been
0
enabled. This event wakes up the chip and contributes to the
event router interrupt when bit 0 = 1 in the STATUS register.
3
WAKEUP3_EN A 1 in this bit shows that the WAKEUP3 event has been
0
enabled. This event wakes up the chip and contributes to the
event router interrupt when bit 0 = 1 in the STATUS register.
4
ATIMER_EN A 1 in this bit shows that the ATIMER event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
5
RTC_EN
A 1 in this bit shows that the RTC event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
6
BOD_EN
A 1 in this bit shows that the BOD event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
7
WWDT_EN A 1 in this bit shows that the WWDT event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
8
ETH_EN
A 1 in this bit shows that the ETHERNET event has been
0
enabled. This event wakes up the chip and contributes to the
event router interrupt when bit 0 = 1 in the STATUS register.
9
USB0_EN
A 1 in this bit shows that the USB0 event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
10
USB1_EN
A 1 in this bit shows that the USB1 event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
11
-
Reserved.
-
12
CAN_EN
A 1 in this bit shows that the CAN event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
13
TIM2_EN
A 1 in this bit shows that the TIM2 event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
14
TIM6_EN
A 1 in this bit shows that the TIM6 event has been enabled. 0
This event wakes up the chip and contributes to the event
router interrupt when bit 0 = 1 in the STATUS register.
15
QEI_EN
A 1 in this bit shows that the QEI event has been enabled. This 0
event wakes up the chip and contributes to the event router
interrupt when bit 0 = 1 in the STATUS register.
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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