UM10430 Datasheet, PDF (687/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

NXP Semiconductors
PBUS
CLR
ENA
32-bit COUNTER
32
PBUS
UM10430 _Chapter
RESET
28:
L_RP_ESC_ECT1_N8_{T_}x_ENx_SAER_3T^{DeRpAeFtTitDiRv}_E^AeD_N^FR_AIT_B^An_LDFEtTR_{_}e_TADrIMrFR_EuTAD_RpDFRTRtAAFDTTFRiTmADDFReTRDArARFDT(FARRTFADTIDFRTTRDA)ARDFTFDARTRFADTADFRTFRDATADRF
PBUS
ENABLE_BREAK
2
BREAK
ENABLE_CLK
COMPARATOR _EQ
RESET
PBUS
32
SET
COMPARE REGISTER
PBUS
CLR
RESET
32
SET_INT
S
32
PBUS
write '1' to
clear
RESET
PBUS
CLR
MASK REGISTER
0
C
CLR
CTRL
register
PBUS
PBUS
Fig 82. RI timer block diagram
INTR
PBUS
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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