|
UM10430 Datasheet, PDF (1021/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller | |||
|
◁ |
UM10430 NXP Semiconductors
Table 963. Pin description â¦continued
Symbol
Reset Type
state
[1]
P3_5[2]
C12 I; PU I/O
-
Description
GPIO1[15] â
n.c.
General
purpose
digital
inputD/oRuAtFpTuDt RpADiCnFR.ThAaDFTRpADteFRTrADDFR4TRA2AFD:TFRATADpDFRTRDApARFDeTFARnTFADdTDFRiTRDAxARDFTFDARTRFADTADFRTFRDATADRF
-
n.c.
I/O SPIFI_SIO2 â I/O lane 2 for SPIFI.
P3_6[2]
B13 I; PU I/O GPIO0[6] â General purpose digital input/output pin.
-
n.c.
I/O SSP0_SSEL â Slave Select for SSP0.
I/O SPIFI_MISO â Input I1 in SPIFI quad mode; SPIFI output IO1.
P3_7[2]
C11 I; PU -
n.c.
-
n.c.
I/O SSP0_MISO â Master In Slave Out for SSP0.
I/O SPIFI_MOSI â Input I0 in SPIFI quad mode; SPIFI output IO0.
P3_8[2]
C10 I; PU -
n.c.
-
n.c.
I/O SSP0_MOSI â Master Out Slave in for SSP0.
I/O SPIFI_CS â SPIFI serial flash chip select.
P4_0[2]
D5 I; PU I/O GPIO2[0] â General purpose digital input/output pin.
O MCOA0 â Motor control PWM channel 0, output A.
I
NMI â External interrupt input to NMI.
-
n.c.
P4_1[2]
A1 I; PU I/O GPIO2[1] â General purpose digital input/output pin.
O CTOUT_1 â SCT output 1. Match output 1 of timer 0.
O LCDVD0 â LCD data.
-
n.c.
P4_2[2]
D3 I; PU I/O GPIO2[2] â General purpose digital input/output pin.
O CTOUT_0 â SCT output 0. Match output 0 of timer 0.
O LCDVD3 â LCD data.
-
n.c.
P4_3[2]
C2 I; PU I/O GPIO2[3] â General purpose digital input/output pin.
O CTOUT_3 â SCT output 0. Match output 3 of timer 0.
O LCDVD2 â LCD data.
-
n.c.
P4_4[2]
B1 I; PU I/O GPIO2[4] â General purpose digital input/output pin.
O CTOUT_2 â SCT output 2. Match output 2 of timer 0.
O LCDVD1 â LCD data.
-
n.c.
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 â 20 July 2011
© NXP B.V. 2011. All rights reserved.
1021 of 1164
|
▷ |