UM10430 Datasheet, PDF (304/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

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corresponds to card[0]. Only NUM_CARDS*2 number of bits
are implemented.
31:16 CARD_WIDTH One bit per card indicates if card is 8-bit:
0
0 - Non 8-bit mode
1 - 8-bit mode Bit[31] corresponds to card[15]; bit[16]
corresponds to card[0].
18.6.8 Block Size Register (BLKSIZ)
Table 232. Block Size Register (BLKSIZ, address 0x4000 401C) bit description
Bit
Symbol
Description
15:0
BLOCK_SIZE
Block size
Reset value
0x200
31:16
-
Reserved
18.6.9 Byte Count Register (BYTCNT)
Table 233. Byte Count Register (BYTCNT, address 0x4000 4020) bit description
Bit Symbol
Description
Reset
value
31:0 BYTE_COUNT
Number of bytes to be transferred; should be integer multiple
of Block Size for block transfers. For undefined number of byte
transfers, byte count should be set to 0. When byte count is set
to 0, it is responsibility of host to explicitly send stop/abort
command to terminate data transfer.
0x200
18.6.10 Interrupt Mask Register (INTMASK)
Table 234. Interrupt Mask Register (INTMASK, address 0x4000 4024) bit description
Bit
Symbol
Description
Reset
value
0
CD
Card detect. Bits used to mask unwanted interrupts. Value 0
of 0 masks interrupt; value of 1 enables interrupt.
1
RE
Response error. Bits used to mask unwanted interrupts. 0
Value of 0 masks interrupt; value of 1 enables interrupt.
2
CD
Command done. Bits used to mask unwanted interrupts. 0
Value of 0 masks interrupt; value of 1 enables interrupt.
3
DTO
Data transfer over. Bits used to mask unwanted interrupts. 0
Value of 0 masks interrupt; value of 1 enables interrupt.
4
TXDR
Transmit FIFO data request. Bits used to mask unwanted 0
interrupts. Value of 0 masks interrupt; value of 1 enables
interrupt.
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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