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UM10430 Datasheet, PDF (784/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller
UM10430 NXP SemiconductlCsNSFaoeoKoStcrrrtishaaseceilf:ogtssenTnhrtehaiitnfaelhtueicesoorh,fpLufbt-uSshciltahBlterotiapdhncnaasHtsshluaIfGeesbvereeHrssie,sdontidnhenagleveatiactedccedalthorgtaceaceandktnsoopbmfteybrSiiresstiKhostatedi.rotaAerannetftstbchtefheeeereigrvtrriheeeneencsdsedlhaatiovionsftetdftiehbtlheriein,tenDeorhdCRefrarseAchawsiFeitmanThhbivpeDeeetethRrn,eeeAFDfonrtoFRhnIsT3lrFAaea4tsDOFthmc:CTiRne.hALDeSgeFfRPlaTmedADpClDFRliaitinTn1RnArnaA8FgDgtnnTFhRxoeeTsAeDxerdfDFResrSgaTRDAeresAHRFDSscTFA,ReIPaoTGFADtif0hvTDFRH/eeTRDA1.ARDFTFDARTRFADTADFRTFRDATADRF
single transfer. However, the CS line is continuously asserted (held LOW) and
transmission of data occurs back to back. The control byte of the next frame follows
directly after the LSB of the received data from the current frame. Each of the received
values is transferred from the receive shifter on the falling edge SK, after the LSB of the
frame has been latched into the SSP.
SK
CS
SO
LSB
MSB
SI
0 MSB
LSB
4 to 16 bits
output data
8-bit control
LSB
MSB
LSB
4 to 16 bits
output data
Fig 106. Microwire frame format (continuous transfers)
34.7.3.1
Setup and hold time requirements on CS with respect to SK in Microwire
mode
In the Microwire mode, the SSP slave samples the first bit of receive data on the rising
edge of SK after CS has gone LOW. Masters that drive a free-running SK must ensure
that the CS signal has sufficient setup and hold margins with respect to the rising edge of
SK.
Figure 107 illustrates these setup and hold time requirements. With respect to the SK
rising edge on which the first bit of receive data is to be sampled by the SSP slave, CS
must have a setup of at least two times the period of SK on which the SSP operates. With
respect to the SK rising edge previous to this edge, CS must have a hold of at least one
SK period.
tHOLD= tSK tSETUP=2*tSK
SK
CS
SI
Fig 107. Microwire frame format setup and hold details
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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