UM10430 Datasheet, PDF (655/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

UM10430 NXP Sem₂₂₆i_.6c7.o.71n._01d.01uctM_MTmobo_anhoCCrseads_{ePPenCdW,yWNoaoTMnnMrCdtahCOliCelnoNooPcufroCuntehugLnteniKCtstetthCcoerrlrnmoeoccetonorkdMon.tCertlChroorwIaellhsipnaretwpedetuhghratees2idrst.6htdIt:heferLerteriPmtcshCoeesu1rMn8mtxCeoxrPdaMeWdoiMvstaoscnrehclCeaecn}^D_sot^R_nneo^A_etdn^Fr_l,s^To_{rtilDahsRPrieneADWgcFRiTon}^AM_auDFnt^TR_ni(mdMAt^D_{/eFeoROrTADrraDTFRofaTdRAOrlAv}^FD_lcCi^TF_{aRnoTnAODguDFRcNnTeRDAetdAPRFDseTFAgRWrTFAeDTDFRMsTRDA)ARDFTFDARTRFADTADFRTFRDATADRF}
This address is read-only. To set or clear the register bits, write ones to the
CNTCON_SET or CNTCON_CLR address.
Table 568. MCPWM Count Control read address (CNTCON - 0x400A 005C) bit description
Bit Symbol
Value Description
0
TC0MCI0_RE
Counter 0 rising edge mode, channel 0.
0
A rising edge on MCI0 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a rising edge on MCI0.
1
TC0MCI0_FE
Counter 0 falling edge mode, channel 0.
0
A falling edge on MCI0 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a falling edge on MCI0.
2
TC0MCI1_RE
Counter 0 rising edge mode, channel 1.
0
A rising edge on MCI1 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a rising edge on MCI1.
3
TC0MCI1_FE
Counter 0 falling edge mode, channel 1.
0
A falling edge on MCI1 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a falling edge on MCI1.
4
TC0MCI2_RE
Counter 0 rising edge mode, channel 2.
0
A rising edge on MCI0 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a rising edge on MCI2.
5
TC0MCI2_FE
Counter 0 falling edge mode, channel 2.
0
A falling edge on MCI0 does not affect counter 0.
1
If MODE0 is 1, counter 0 advances on a falling edge on MCI2.
6
TC1MCI0_RE
Counter 1 rising edge mode, channel 0.
0
A rising edge on MCI0 does not affect counter 1.
1
If MODE1 is 1, counter 1 advances on a rising edge on MCI0.
7
TC1MCI0_FE
Counter 1 falling edge mode, channel 0.
0
A falling edge on MCI0 does not affect counter 1.
1
If MODE1 is 1, counter 1 advances on a falling edge on MCI0.
8
TC1MCI1_RE
Counter 1 rising edge mode, channel 1.
0
A rising edge on MCI1 does not affect counter 1.
1
If MODE1 is 1, counter 1 advances on a rising edge on MCI1.
9
TC1MCI1_FE
Counter 1 falling edge mode, channel 1.
0
A falling edge on MCI0 does not affect counter 1.
1
If MODE1 is 1, counter 1 advances on a falling edge on MCI1.
Reset
value
0
0
0
0
0
0
0
0
0
0
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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