UM10430 Datasheet, PDF (889/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

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a noise pulse as a clock. In this case, the problem can be solved by transmitting additional
clock pulses on the SCL line (see Figure 146). The I²C interface does not include a
dedicated time-out timer to detect an obstructed bus, but this can be implemented using
another timer in the system. When detected, software can force clocks (up to 9 may be
required) on SCL until SDA is released by the offending device. At that point, the slave
may still be out of synchronization, so a START should be generated to insure that all I²C
peripherals are synchronized.
STA flag
(1)
SDA line
(2)
(3)
(1)
SCL line
start
condition
(1) Unsuccessful attempt to send a START condition.
(2) SDA line is released.
(3) Successful attempt to send a START condition. State 08H is entered.
Fig 146. Recovering from a bus obstruction caused by a LOW level on SDA
37.10.6.5
Bus error
A bus error occurs when a START or STOP condition is detected at an illegal position in
the format frame. Examples of illegal positions are during the serial transfer of an address
byte, a data bit, or an acknowledge bit.
The I²C hardware only reacts to a bus error when it is involved in a serial transfer either as
a master or an addressed slave. When a bus error is detected, the I²C block immediately
switches to the not addressed slave mode, releases the SDA and SCL lines, sets the
interrupt flag, and loads the status register with 0x00. This status code may be used to
vector to a state service routine which either attempts the aborted serial transfer again or
simply recovers from the error condition as shown in Table 824.
37.10.7 I²C state service routines
This section provides examples of operations that must be performed by various I²C state
service routines. This includes:
• Initialization of the I²C block after a Reset.
• I²C Interrupt Service
• The 26 state service routines providing support for all four I²C operating modes.
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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