UM10430 Datasheet, PDF (486/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

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Table 405. MAC Hash table high register (MAC_HASHTABLE_HIGH, address 0x4001 0008) bit
description
Bit Symbol Description
Reset Access
value
31:0 HTH
Hash table high
This field contains the upper 32 bits of Hash table.
0
R/W
22.6.4 MAC Hash table low register
The Hash Table Low register contains the lower 32 bits of the Hash table.
Table 406. MAC Hash table low register (MAC_HASHTABLE_LOW, address 0x4001 0008) bit
description
Bit Symbol Description
Reset Access
value
31:0 HTL
Hash table low
This field contains the upper 32 bits of Hash table.
0
R/W
22.6.5 MAC MII Address register
The MII Address register controls the management cycles to the external PHY through the
management interface.
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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