UM10430 Datasheet, PDF (510/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

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programmed by the Application.
When the power-down mode is enabled in the PMT, then all received frames are dropped
by the core and they are not forwarded to the application. The core comes out of the
power down mode only when either a Magic Packet or a Remote Wake-up frame is
received and the corresponding detection is enabled.
22.7.1.1
Remote wake-up frame registers
The register wkupfmfilter_reg, address (0x028), loads the Wake-up Frame Filter register.
To load values in a Wake-up Frame Filter register, the entire register
(WKUPFMFILTER_REG) must be written. The WKUPFMFILTER_REG register is loaded
by sequentially loading the eight register values in address (0x028) for
WKUPFMFILTER_REG0, WKUPFMFILTER_REG1,... WKUPFMFILTER_REG7,
respectively. WKUPFMFILTER_REG is read in the same way.
Remark: The internal counter to access the appropriate WKUPFMFILTER_REG is
incremented when lane 3 (or lane 0 in big-endian) is accessed by the CPU. This should be
kept in mind if you are accessing these registers in byte or half-word mode.
WKUPFMFILTER0
WKUPFMFILTER1
WKUPFMFILTER2
WKUPFMFILTER3
WKUPFMFILTER4
WKUPFMFILTER5
WKUPFMFILTER6
WKUPFMFILTER7
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
RSVD
Filter 3
Command
Filter 3 Offset
Filter 3 Byte Mask
RSVD
Filter 2
Command
RSVD
Filter 1
Command
Filter 2 Offset
Filter 1 Offset
RSVD
Filter 0
Command
Filter 0 Offset
Filter 1 CRC - 16
Filter 0 CRC - 16
Filter 3 CRC - 16
Filter 2 CRC - 16
Fig 45. Wake-up frame filter register
Filter i byte mask
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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