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UM10430 Datasheet, PDF (227/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller
UM10430 NXP Semi1c4o.n4d.1uctTT0Boaiibmrt slee1r3IS50Ny.VmCTdbieAmosPlcerr0ip0_tCi0oAnVcPaa0lu_pe0CtcuharapepDItnuteviernseercrpti1rniiu4nppp:ttuiuLotmtnPmuCu1lltti8ippxlexlxeGexrleo(CrbAa(PlCI0nDA_Rp0PAu_F0ItTN_MD, 0RauAd_DlFtdRIiTNrApeDFls)eTRsAxDFeR0TADxrDFR4ATR0ArA0FDrTFCRaTADRvy7DFRae0TR(DAlsG0uARFDe0eTFARIt)MTFADbTDFRAiTRDAt)ARDFTFDARTRFADTADFRTFRDATADRF
0
Not inverted.
1
Input inverted.
1
EDGE
Enable rising edge detection
0
No edge detection.
1
Rising edge detection enabled.
2
SYNCH
Enable synchronization
0
Disable synchronization.
1
Enable synchronization.
3
PULSE
Enable single pulse generation.
0
Disable single pulse generation.
1
Enable single pulse generation.
7:4 SELECT
Select input. Values 0x3 to 0xF are reserved.
0x0
CTIN_0
0x1
Reserved
0x2
T0_CAP0
31:8 -
Reserved
14.4.2 Timer 0 CAP0_1 capture input multiplexer (CAP0_1_IN)
Table 136. Timer 0 CAP0_1 capture input multiplexer (CAP0_1_IN, address 0x400C 7004) bit
description
Bit Symbol Value
0
INV
Description
Invert input
Reset
value
0
Not inverted.
1
Input inverted.
1
EDGE
Enable rising edge detection
0
No edge detection.
1
Rising edge detection enabled.
2
SYNCH
Enable synchronization
0
Disable synchronization.
1
Enable synchronization.
3
PULSE
Enable single pulse generation.
0
Disable single pulse generation.
1
Enable single pulse generation.
7:4 SELECT
Select input. Values 0x3 to 0xF are reserved.
0x0
CTIN_1
<Document ID>
User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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