UM10430 Datasheet, PDF (1099/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

UM10430 NXP
Semiconductors
CAN
Table
Bit
7:0
15:8
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31:16 -
Reserved
-
-
CAN message interface data B1 registers
Table 1035.CAN message interface data B1 registers (IF1_DB1, address 0x400E 2044 and
IF2_DB1, address 0x400E 20A4) bit description
Bit Symbol Description
7:0 DATA4 Data byte 4
Reset value Access
0x00
R/W
15:8 DATA5 Data byte 5
0x00
R/W
31:16 -
Reserved
-
-
CAN message interface data B2 registers
Table 1036.CAN message interface data B2 registers (IF1_DB2, address 0x400E 2048 and
IF2_DB2, address 0x400E 20A8) bit description
Bit Symbol Description
7:0 DATA6 Data byte 6
Reset value Access
0x00
R/W
15:8 DATA7 Data byte 7
0x00
R/W
31:16 -
Reserved
-
-
42.10.6.3
Message handler registers
All Message Handler registers are read-only. Their contents (TXRQST, NEWDAT,
INTPND, and MSGVAL bits of each Message Object and the Interrupt Identifier) is status
information provided by the Message Handler FSM.
42.10.6.3.1
CAN transmission request 1 register
This register contains the TXRQST bits of message objects 1 to 16. By reading out the
TXRQST bits, the CPU can check for which Message Object a Transmission Request is
pending. The TXRQST bit of a specific Message Object can be set/reset by the CPU via
the IFx Message Interface Registers or by the Message Handler after reception of a
Remote Frame or after a successful transmission.
Table 1037.CAN transmission request 1 register (TXREQ1, address 0x400E 2100) bit
description
Bit Symbol
Description
Reset
value
Access
15:0 TXRQST16_1 Transmission request bit of message objects 16 to 1. 0x00
R
0 = This message object is not waiting for
transmission.
1 = The transmission of this message object is
requested and not yet done.
31:16 -
Reserved
-
-
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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