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UM10430 Datasheet, PDF (74/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller
UM10430 NXP
Semiconductors
Table
Bit
8:0
22:9
23
49.
FREQ_MON register
Symbol
RCNT
FCNT
MEAS
Value
(FD9M1R-4eeb-EsaibtcQsirtCrue_isrhpfMeeetalriOefoeprceNnnttqece, uedraedc9cnldl:oocrcLycekkPs--cscCoo01uux8nn4txtee0xrr0Dv5vRCaaA0llloFuu0Teec1Dk4R)GADbFReitTAndDFeeTR00Rv0rsADaaceFRtlTrsuiADioepDeFRtnTRtAiAoFDUTFRnTnADRRARDiFR/c/tTRWWDAc(ARFDCeTFARsTGFADsTDFRUTRDA)ARDFTFDARTRFADTADFRTFRDATADRF
0
RCNT and FCNT disabled
1
Frequency counters started
28:24 CLK_SEL
Clock-source selection for the clock to be 0
R/W
measured. All other values are reserved.
0x00
32 kHz oscillator (default)
0x01
IRC
0x02
ENET_RX_CLK
0x03
ENET_TX_CLK
0x04
GP_CLKIN
0x05
Reserved
0x06
Crystal oscillator
0x07
PLL0 (USB)
0x08
PLL0 (audio)
0x09
PLL1
0x0A Reserved
0x0B Reserved
0x0C IDIVA
0x0D IDIVB
0x0E IDIVC
0x0F
IDIVD
0x10
IDIVE
31:29 -
Reserved
-
-
9.6.2 Crystal oscillator control register
The register XTAL_OSC_CONTROL contains the control bits for the crystal oscillator.
Table 50. XTAL_OSC_CTRL register (XTAL_OSC_CTRL, address 0x4005 0018) bit
description
Bit
Symbol Value Description
Reset Access
value
0
ENABLE
Oscillator-pad enable. Do not change the BYPASS 1
R/W
and ENABLE bits in one write-action: this will result
in unstable device operation!
0
Enable
1
Power-down (default)
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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