UM10430 Datasheet, PDF (728/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

UM10430 NXP
Semiconductors
Table
Bit
3:0
6F_D7u8_{IVn.Ac1UDt0iADo2RnV8TA(UL}FAraR_BDIUc_fTtaAeti_h2uos_{Ri)dcns,Tra0rfiaib}lpx_etaDt4_{lediu0iovgdi0ns}i_eCdrn0ae_e,2tr_erf0Rra.2ate_i8cog_tni(ioUsnptA_are_eRlr_-bTs(F_ac3uD_a))dlR_ebrr-_aidtatiedvde_ig^Cd_sseor^h_cenrr^as_evi^psp_raa^Det^t_luti^eRs_ooe^Ar_rn0.^F3_wx^T24_il^D_l0^:R_n0^LAD_o8^PF_t^R1^T_i^CA_m0^DF12_p^TR88_a^ADx_c^F(^RU_t^xTAD_tA^DFR_h^UTRAR_e^SAFDT^TFAR0Rv_0TAD)^R_a,De^FR_l^T0^T_{sRDAuxeA0RFDe4}^T_{tFA_R}0_TFAD20^TDFR_C_{TRDA3ARDFTFDARTRFADTADFRTFRDATADRF}
7:4 MULVAL
Baud rate pre-scaler multiplier value.
1
This field must be greater or equal 1 for UART to operate
properly, regardless of whether the fractional baud rate
generator is used or not.
31:8 -
Reserved, user software should not write ones to reserved bits. 0
The value read from a reserved bit is not defined.
This register controls the clock pre-scaler for the baud rate generation. The reset value of
the register keeps the fractional capabilities of UART disabled making sure that UART is
fully software and hardware compatible with UARTs not equipped with this feature.
The UART baud rate can be calculated as:
(7)
UART_baudrate
=
--------------------------------------------------^P----^C----^L----^K----------------------------------------------------
16  256  DLM + DLL  _1 + -^D----^iM--^v---^A-_u---_ld--_V--^d--_a-^V--_l--^a---^l_
Where UART_PCLK is the peripheral clock, DLM and DLL are the standard UART baud
rate divider registers, and DIVADDVAL and MULVAL are UART fractional baud rate
generator specific parameters.
The value of MULVAL and DIVADDVAL should comply to the following conditions:
1. 1 MULVAL  15
2. 0  DIVADDVAL  14
3. DIVADDVAL< MULVAL
The value of the FDR should not be modified while transmitting/receiving data or data may
be lost or corrupted.
If the FDR register value does not comply to these two requests, then the fractional divider
output is undefined. If DIVADDVAL is zero then the fractional divider is disabled, and the
clock will not be divided.
32.5.12.1
Baud rate calculation
UART can operate with or without using the Fractional Divider. In real-life applications it is
likely that the desired baud rate can be achieved using several different Fractional Divider
settings. The following algorithm illustrates one way of finding a set of DLM, DLL,
MULVAL, and DIVADDVAL values. Such set of parameters yields a baud rate with a
relative error of less than 1.1% from the desired one.
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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