UM10430 Datasheet, PDF (225/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

NXP Semiconductors
usb0
SOF_VF_INDICATOR
usb1
SOF_VF_INDICATOR
i2s0
rx_mws
tx_mws
i2s1
rx_mws
tx_mws
UM10430 _{Chapter 14: LPC18xx}
GPIO6[28]
GPIO5[3]
Globa_{iiiiiiGnnnnnniiiii_nnnnn}l_{IppppppMppppp}I_33333301234nD_A123456^{RpAuFtTMDRuADlFtRiTApDFleTRAxDFeRTADrDFRATRArAFDrTFRaTADyDFRTR(DAGARFDTFARIMTFADTDFRATRDA)ARDFTFDARTRFADTADFRTFRDATADRF}
U0_TXD
inp23
U0_RXD
inp24
U2_TXD
inp25
U2_RXD
inp26
U3_TXD
inp27
U3_RXD
inp28
div128
div128
div128
div128
motocon
MCO2B
inp29
inp30
inp37
inp38
outp24
outp25
outp26
outp27
inp5
inp30
outp28
outp29
tbd
adctrig0
vadc
event
router
adc0/1
ADC start0
ADC start1
ADC start3
ADC start4
ADC start5
Fig 25. Cross connections between GIMA, ADC, and event router
adctrig1
MCO2A
14.4 Register description
Table 134. Register overview: GIMA (base address: 0x400C 7000)
Name
CAP0_0_IN
CAP0_1_IN
Access
R/W
R/W
Address
offset
0x000
0x004
Description
Timer 0 CAP0_0 capture input
multiplexer (GIMA output 0)
Timer 0 CAP0_1 capture input
multiplexer (GIMA output 1)
CAP0_2_IN
R/W
0x008 Timer 0 CAP0_2 capture input
multiplexer (GIMA output 2)
CAP0_3_IN
R/W
0x00C Timer 0 CAP0_3 capture input
multiplexer (GIMA output 3)
CAP1_0_IN
R/W
0x010 Timer 1 CAP1_0 capture input
multiplexer (GIMA output 4)
CAP1_1_IN
R/W
0x014 Timer 1 CAP1_1 capture input
multiplexer (GIMA output 5)
CAP1_2_IN
R/W
0x018 Timer 1 CAP1_2 capture input
multiplexer (GIMA output 6)
CAP1_3_IN
R/W
0x01C Timer 1 CAP1_3 capture input
multiplexer (GIMA output 7)
CAP2_0_IN
R/W
0x020 Timer 2 CAP2_0 capture input
multiplexer (GIMA output 8)
Reset
value
0
0
0
0
0
0
0
0
0
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User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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