UM10430 Datasheet, PDF (841/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

NXP Semiconductors
C_CAN
TD0, TD1 RD0, RD1
=1
Rx
Tx
CAN CORE
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Fig 127. CAN core in Loop-back mode combined with Silent mode
36.7.2.4.4 Basic mode
The CAN Core can be set in Basic mode by programming the Test Register bit BASIC to
one. In this mode the CAN controller runs without the Message RAM.
The IF1 Registers are used as Transmit Buffer. The transmission of the contents of the
IF1 Registers is requested by writing the BUSY bit of the IF1 Command Request Register
to ‘1’. The IF1 Registers are locked while the BUSY bit is set. The BUSY bit indicates that
the transmission is pending.
As soon the CAN bus is idle, the IF1 Registers are loaded into the shift register of the CAN
Core and the transmission is started. When the transmission has completed, the BUSY bit
is reset and the locked IF1 Registers are released.
A pending transmission can be aborted at any time by resetting the BUSY bit in the IF1
Command Request Register while the IF1 Registers are locked. If the CPU has reset the
BUSY bit, a possible retransmission in case of lost arbitration or in case of an error is
disabled.
The IF2 Registers are used as Receive Buffer. After the reception of a message the
contents of the shift register is stored into the IF2 Registers, without any acceptance
filtering.
Additionally, the actual contents of the shift register can be monitored during the message
transfer. Each time a read Message Object is initiated by writing the BUSY bit of the IF2
Command Request Register to ‘1’, the contents of the shift register is stored into the IF2
Registers.
In Basic mode the evaluation of all Message Object related control and status bits and of
the control bits of the IFx Command Mask Registers is turned off. The message number of
the Command request registers is not evaluated. The NEWDAT and MSGLST bits of the
IF2 Message Control Register retain their function, DLC3-0 will show the received DLC,
the other control bits will be read as ‘0’.
In Basic mode the ready output CAN_WAIT_B is disabled (always ‘1’)
36.7.2.4.5 Software control of pin CAN_TXD
Four output functions are available for the CAN transmit pin CAN_TXD:
1. serial data output (default).
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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