UM10430 Datasheet, PDF (52/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

UM10430 NXP
Semiconductors
Table 26. Interrupt clear
Bit
Symbol
16
TIM14_CLRST
18:17 -
19
RESET_CLRST
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the STATUS register.
31:20 -
Reserved.
-
6.6.8 Set status register
Table 27. Interrupt set status register (SET_STAT - address 0x4004 4FEC) bit description
Bit Symbol
Description
Reset
value
0
WAKEUP0_SETST Writing a 1 to this bit sets the STATUS event bit 0 in the
STATUS register.
1
WAKEUP1_SETST Writing a 1 to this bit sets the STATUS event bit 1 in the
STATUS register.
2
WAKEUP2_SETST Writing a 1 to this bit sets the STATUS event bit 2 in the
STATUS register.
3
WAKEUP3_SETST Writing a 1 to this bit sets the STATUS event bit 3 in the
STATUS register.
4
ATIMER_SETST
Writing a 1 to this bit sets the STATUS event bit 4 in the
STATUS register.
5
RTC_SETST
Writing a 1 to this bit sets the STATUS event bit 5 in the
STATUS register.
6
BOD_SETST
Writing a 1 to this bit sets the STATUS event bit 6 in the
STATUS register.
7
WWDT_SETST
Writing a 1 to this bit sets the STATUS event bit 7 in the
STATUS register.
8
ETH_SETST
Writing a 1 to this bit sets the STATUS event bit 8 in the
STATUS register.
9
USB0_SETST
Writing a 1 to this bit sets the STATUS event bit 9 in the
STATUS register.
10
USB1_SETST
Writing a 1 to this bit sets the STATUS event bit 10 in the
STATUS register.
11
-
Reserved.
12
CAN_SETST
Writing a 1 to this bit sets the STATUS event bit 12 in the
STATUS register.
13
TIM2_SETST
Writing a 1 to this bit sets the STATUS event bit 13 in the
STATUS register.
14
TIM6_SETST
Writing a 1 to this bit sets the STATUS event bit 14 in the
STATUS register.
15
QEI_SETST
Writing a 1 to this bit sets the STATUS event bit 15 in the
STATUS register.
16
TIM14_SETST
Writing a 1 to this bit sets the STATUS event bit 16 in the
STATUS register.
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User manual
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Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
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