UM10430 Datasheet, PDF (725/1164 Pages) NXP Semiconductors – LPC18xx ARM Cortex-M3 microcontroller

UM10430 NXP Semiconduct_TATAAfuo_hhBClnsr_eeTcRos_{tO,afirrowuaIenntchgotteoCi-isobnfltnraeUaaaurAulndwtRbdoriaTni-tAbute_eaBd.PruETrCrudahOLpteieIKstnsm,guthEnesinanuenivmdembe,ribuatatsemotno.rybroaemwfnddcruilatsetethtaaetbroebemdiDtdsaLbi,xsMysiamtsboaeulpnetmtddbinCiDb(tgDshaLtIuaaLhVdpneAr}^Dt_derDeRcagp^Ar_oDti^F_aesr3V^T_rtrs2eeiA^D_{t:ssyrRLspuLAb}^D_{op=sPFRintphTCAs0dooDF.)1iru}^TR_nt8dlAe^D_{gdxuFdRxTrAbADibnDeFRCUyTgRAdRSAFDUao}^TFAR_{uAnTADRteRDFRoTTRDAT-bbA0RFDeTFAaa_RfTFAoruD2e}^TDFR_{rd_eTRDA.3ARDFTFDARTRFADTADFRTFRDATADRF}
(6)
ratemin
=
2_-----_-----P_----C_----L_----K_--
16  215

U
ARTb
au
dr
at
e

-----------------------------------------------^P----^C----^L----^K------------------------------------------------
16  2 + databits + paritybits + stopbits
=
ratemax
32.5.10.2
Auto-baud modes
When the software is expecting an ”AT" command, it configures the UART with the
expected character format and sets the ACR Start bit. The initial values in the divisor
latches DLM and DLM don‘t care. Because of the ”A" or ”a" ASCII coding (”A" = 0x41,
”a" = 0x61), the UART Rx pin sensed start bit and the LSB of the expected character are
delimited by two falling edges. When the ACR Start bit is set, the auto-baud protocol will
execute the following phases:
1. On ACR Start bit setting, the baud rate measurement counter is reset and the UART
RSR is reset. The RSR baud rate is switched to the highest rate.
2. A falling edge on UART Rx pin triggers the beginning of the start bit. The rate
measuring counter will start counting UART_PCLK cycles.
3. During the receipt of the start bit, 16 pulses are generated on the RSR baud input with
the frequency of the UART input clock, guaranteeing the start bit is stored in the RSR.
4. During the receipt of the start bit (and the character LSB for Mode = 0), the rate
counter will continue incrementing with the pre-scaled UART input clock
(UART_PCLK).
5. If Mode = 0, the rate counter will stop on next falling edge of the UART Rx pin. If
Mode = 1, the rate counter will stop on the next rising edge of the UART Rx pin.
6. The rate counter is loaded into DLM/DLL and the baud rate will be switched to normal
operation. After setting the DLM/DLL, the end of auto-baud interrupt IIR ABEOInt will
be set, if enabled. The RSR will now continue receiving the remaining bits of the ”A/a"
character.
<Document ID>
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
© NXP B.V. 2011. All rights reserved.
725 of 1164