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MC9S12T64 Datasheet, PDF (83/608 Pages) Motorola, Inc – Specification
Freescale Semiconductor, Inc.
System Configuration
System Clock Description
Table 18 Module Availability in WAIT and RUN Modes
Module Name
Wait Mode(1)
(Disable Bit)
Run Mode
(Enable Bit)
HCS12 Core
Always Enabled
Always Enabled
Flash
Always Enabled
Always Enabled
CALRAM
Always Enabled
Always Enabled
SRAM
Always Enabled
Always Enabled
PIM
Always Enabled
Always Enabled
PWM
PSWAI
(PWMCTL Register)
Always Enabled(2)
ECT
TSWAIT
(TSCR1 Register)
Always Enabled
ATD
AWAI
(ATDCTL2 Register)
Always Enabled(2)
SPI
SPISWAI
(SPICR2 Register)
SPE
(SPICR1 Register)
LVD
Disabled
LVDE
(LVDCR Register)
SCI0, SCI1
SCISWAI
(SCIxCR1 Register)
Always Enabled
1. Assuming all system clocks are running during WAIT mode (SYSWAI=0 in CLKSEL reg-
ister - see page 284)
2. Low power options available. See the correspondent module section for details
MOTOROLA
System Configuration
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MC9S12T64Revision 1.1.1
83