MC9S12T64 Datasheet, PDF (582/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Electrical Characteristics
Table 118 PLL Characteristics
Conditions are shown in Table 106 unless otherwise noted
Num
Rating
Symbol Min
Typ
Max Unit
1 Self Clock Mode frequency
f_SCM
3
2 VCO locking range
f_VCO
8
3
PLL Lock Time ⁽¹⁾
t_lock
1
Jitter ⁽²⁾
4
Short term (5µs interval) j_short
–0.26
Long term (500µs interval) j_long
–0.05
MHz
32
MHz
ms
0.26
%
0.05
1. Lock time is defined as the time necessary for the PLL to have its LOCK bit asserted after its multiplication factor
ù ⋅ 〈 ĚĠĕę + ø〉 ⁄ 〈 ęČĝċč + ø〉 was changed.
2. Jitter is defined as the average deviation from the programmed target frequency measured over an specific time interval
(5 µs or 500 µs) at maximum f_VCO.
SPI Timing
Master Mode
Figure 112 and Figure 113 illustrate the master mode timing. Timing
values are shown in Table 119.
MC9S12T64Revision 1.1.1
582
Electrical Characteristics
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA