MC9S12T64 Datasheet, PDF (130/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Module Mapping Control (MMC)
Memory Size
Register Zero
(MEMSIZ0)
The bits in this register provide read visibility to the system physical
memory space allocations defined at system integration. Table 16 (page
79) in the System Configuration section shows the values assigned to
these bits at system integration.
Read: Anytime
Write: Writes have no effect
Address Offset: $001C
Bit 7
6
5
4
3
2
1
Bit 0
Read: reg_sw0
0
eep_sw1 eep_sw0
0
ram_sw2 ram_sw1 ram_sw0
Write:
Reset: 0
0
0
1
0
0
0
0
= Unimplemented
reg_sw0 - Allocated System Register Space
eep_sw1:eep_sw0 - Allocated System CALRAM Memory Space
ram_sw2:ram_sw0 - Allocated System RAM Memory Space
MC9S12T64Revision 1.1.1
130
Module Mapping Control (MMC)
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