MC9S12T64 Datasheet, PDF (298/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
• ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit should be
asserted to configure the filter in acquisition mode.
• After turning on the PLL by setting the PLLON bit software must
wait a given time before entering tracking mode (ACQ = 0).
• After entering tracking mode software must wait a given time
before selecting the PLLCLK as the source for system and core
clocks (PLLSEL = 1).
MC9S12T64Revision 1.1.1
298
Clocks and Reset Generator (CRG)
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA