MC9S12T64 Datasheet, PDF (213/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Flash EEPROM 64K
Register Descriptions
FPLS[1:0] — Flash Protection Lower Address Size
The FPLS[1:0] bits determine the size of the protected sector. Refer to
Table 44.
Table 44 Lower Address Range Protection
FPLS[1:0]
00
01
10
11
Protected Address Range
Block 0
Block 1
$8000–$81FF
$0000–$01FF
$8000–$83FF
$0000–$03FF
$8000–$87FF
$0000–$07FF
$8000–$8FFF
$0000–$0FFF
Protected Size
(Bytes)
512 Bytes
1K
2K
4K
NV6 — Non Volatile Flag Bit
This bit is available as non-volatile flag.
FSTAT — Flash
Status Register
The FSTAT register defines the Flash state machine command status
and Flash array access, protection and blank verify status. This register
is banked.
Address Offset: $0105
Bit 7
6
5
4
3
2
1
Read:
CCIF
0
0
CBEIF
PVIOL ACCERR
BLANK
Write:
Reset: 1
1
0
0
0
0
0
= Reserved or unimplemented
Bit 0
0
0
Read: Anytime
Write: Anytime to clear flags
CBEIF — Command Buffer Empty Interrupt Flag
The CBEIF flag indicates that the address, data and command buffers
are empty so that a new command sequence can be started. The
CBEIF flag is cleared by writing a “1” to CBEIF. Writing a “0” to the
MOTOROLA
Flash EEPROM 64K
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MC9S12T64Revision 1.1.1
213