MC9S12T64 Datasheet, PDF (110/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Operating Modes
Internal Visibility
Emulation
Expanded Wide
Mode
location. If there are no writable resources in the external system, PE2
can be left as a general purpose I/O pin.
Internal visibility is available when the MCU is operating in expanded
wide modes, special test mode or emulation narrow mode. It is not
available in single-chip, peripheral or normal expanded narrow modes.
Internal visibility is enabled by setting the IVIS bit in the MODE register.
If an internal access is made while E, R/W, and LSTRB are configured
as bus control outputs and internal visibility is off (IVIS=0), E will remain
low for the cycle, R/W will remain high, and address, data and the
LSTRB pins will remain at their previous state.
When internal visibility is enabled (IVIS=1), certain internal cycles will be
blocked from going external to prevent possible corruption of external
devices. During cycles when the BDM is selected, R/W will remain high,
data will maintain its previous state, and address and LSTRB pins will be
updated with the internal value. During CPU no access cycles when the
BDM is not driving, R/W will remain high, and address, data and the
LSTRB pins will remain at their previous state.
In expanded wide modes, Ports A and B are configured as a 16-bit
multiplexed address and data bus and Port E provides bus control and
status signals. These signals allow external memory and peripheral
devices to be interfaced to the MCU. These signals can also be used by
a logic analyzer to monitor the progress of application programs.
The bus control related pins in Port E (PE7/NOACC,
PE6/MODB/IPIPE1, PE5/MODA/IPIPE0, PE4/ECLK,
PE3/LSTRB/TAGLO, and PE2/R/W) are all configured to serve their bus
control output functions rather than general purpose I/O. Notice that
writes to the bus control enable bits in the PEAR register in emulation
mode are restricted.
The main difference between emulation modes and normal modes is
that some of the bus control and system control signals cannot be written
in emulation modes.
MC9S12T64Revision 1.1.1
110
Operating Modes
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