MC9S12T64 Datasheet, PDF (380/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Enhanced Capture Timer (ECT)
time as the successful output compare then forced output compare
action will take precedence and interrupt flag won’t get set.
Output Compare 7
Mask Register
(OC7M)
Register offset: $0042
Bit 7
Read:
OC7M7
Write:
Reset:
0
6
OC7M6
0
5
OC7M5
0
4
OC7M4
0
3
OC7M3
0
2
OC7M2
0
1
OC7M1
0
Bit 0
OC7M0
0
Read or write anytime.
Setting the OC7Mn (n ranges from 0 to 6) will set the corresponding port
to be an output port when the corresponding IOSn (TIOS register; n
ranges from 0 to 6) bit is set to be an output compare.
NOTE:
A successful channel 7 output compare overrides any channel 6:0
compares. For each OC7M bit that is set, the output compare action
reflects the corresponding OC7D bit.
MC9S12T64Revision 1.1.1
380
Enhanced Capture Timer (ECT)
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