MC9S12T64 Datasheet, PDF (37/608 Pages) Motorola, Inc – Specification

Source Form
ADCA #opr8i
ADCA opr8a
ADCA opr16a
ADCA oprx0_xysppc
ADCA oprx9,xysppc
ADCA oprx16,xysppc
ADCA [D,xysppc]
ADCA [oprx16,xysppc]
ADCB #opr8i
ADCB opr8a
ADCB opr16a
ADCB oprx0_xysppc
ADCB oprx9,xysppc
ADCB oprx16,xysppc
ADCB [D,xysppc]
ADCB [oprx16,xysppc]
ADDA #opr8i
ADDA opr8a
ADDA opr16a
ADDA oprx0_xysppc
ADDA oprx9,xysppc
ADDA oprx16,xysppc
ADDA [D,xysppc]
ADDA [oprx16,xysppc]
ADDB #opr8i
ADDB opr8a
ADDB opr16a
ADDB oprx0_xysppc
ADDB oprx9,xysppc
ADDB oprx16,xysppc
ADDB [D,xysppc]
ADDB [oprx16,xysppc]
ADDD #opr16i
ADDD opr8a
ADDD opr16a
ADDD oprx0_xysppc
ADDD oprx9,xysppc
ADDD oprx16,xysppc
ADDD [D,xysppc]
ADDD [oprx16,xysppc]
ANDA #opr8i
ANDA opr8a
ANDA opr16a
ANDA oprx0_xysppc
ANDA oprx9,xysppc
ANDA oprx16,xysppc
ANDA [D,xysppc]
ANDA [oprx16,xysppc]
ANDB #opr8i
ANDB opr8a
ANDB opr16a
ANDB oprx0_xysppc
ANDB oprx9,xysppc
ANDB oprx16,xysppc
ANDB [D,xysppc]
ANDB [oprx16,xysppc]
ANDCC #opr8i
MOTOROLA
Freescale Semiconductor, Inc.
Central Processing Unit (CPU)
Instruction Set Overview
Table 4 Instruction Set Summary (Continued)
Operation
Add with carry to A; (A)+(M)+C⇒A
or (A)+imm+C⇒A
Add with carry to B; (B)+(M)+C⇒B
or (B)+imm+C⇒B
Add to A; (A)+(M)⇒A
or (A)+imm⇒A
Add to B; (B)+(M)⇒B
or (B)+imm⇒B
Add to D; (A:B)+(M:M+1)⇒A:B
or (A:B)+imm⇒A:B
AND with A; (A)•(M)⇒A
or (A)•imm⇒A
AND with B; (B)•(M)⇒B
or (B)•imm⇒B
AND with CCR; (CCR)•imm⇒CCR
Address
Machine
Mode Coding (Hex)
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
89 ii
99 dd
B9 hh ll
A9 xb
A9 xb ff
A9 xb ee ff
A9 xb
A9 xb ee ff
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
C9 ii
D9 dd
F9 hh ll
E9 xb
E9 xb ff
E9 xb ee ff
E9 xb
E9 xb ee ff
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
IMM
8B ii
9B dd
BB hh ll
AB xb
AB xb ff
AB xb ee ff
AB xb
AB xb ee ff
CB ii
DB dd
FB hh ll
EB xb
EB xb ff
EB xb ee ff
EB xb
EB xb ee ff
C3 jj kk
D3 dd
F3 hh ll
E3 xb
E3 xb ff
E3 xb ee ff
E3 xb
E3 xb ee ff
84 ii
94 dd
B4 hh ll
A4 xb
A4 xb ff
A4 xb ee ff
A4 xb
A4 xb ee ff
C4 ii
D4 dd
F4 hh ll
E4 xb
E4 xb ff
E4 xb ee ff
E4 xb
E4 xb ee ff
10 ii
Access Detail
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
PO
RPf
RPO
RPf
RPO
fRPP
fIfRPf
fIPRPf
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
P
rPf
rPO
rPf
rPO
frPP
fIfrPf
fIPrPf
P
SXHINZVC
––∆–∆∆∆∆
––∆–∆∆∆∆
––∆–∆∆∆∆
––∆–∆∆∆∆
––––∆∆∆∆
––––∆∆0–
––––∆∆0–
⇓⇓⇓⇓⇓⇓⇓⇓
Central Processing Unit (CPU)
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1
37