MC9S12T64 Datasheet, PDF (528/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Fast Background Debug Module (FBDM)
BDM Internal
Register Position
Register (BDMINR)
Address: $FF07
Read:
Write:
Reset:
Bit 7
0
0
6
5
4
3
2
REG14 REG13 REG12 REG11
0
1
Bit 0
0
0
0
0
0
0
0
0
0
= Unimplemented
Read: All modes
Write: Never
REG14–REG11 — Internal register map position
These four bits show the state of the upper bits of the base address
for the system’s relocatable register block. BDMINR is a shadow of
the INITRG register which maps the register block to any 2K byte
space within the first 32K bytes of the 64K byte address space. If the
register block size is 1K bytes, it will always occupy the first 1K bytes
of the specified 2K byte space.
Functional Description
The BDM module receives and executes commands from a host via a
single wire serial interface or via the BDM SPI interface. There are two
types of BDM commands, namely, hardware commands and firmware
commands.
Hardware commands are used to read and write target system memory
locations and to enter active background debug mode (see BDM
Hardware Commands). Target system memory includes all memory that
is accessible by the CPU.
Firmware commands are used to read and write CPU resources and to
exit from active background debug mode (see Standard BDM Firmware
Commands). The CPU resources referred to are the accumulator (D), X
MC9S12T64Revision 1.1.1
528
Fast Background Debug Module (FBDM)
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