MC9S12T64 Datasheet, PDF (377/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Enhanced Capture Timer (ECT)
Register Map
Register
name
MCCTL
Read:
Write:
MCFLG
Read:
Write:
ICPAR
Read:
Write:
DLYCT
Read:
Write:
ICOVW
Read:
Write:
ICSYS
Read:
Write:
Reserved
Read:
Write:
Reserved for Read:
Factory Test Write:
Reserved
Read:
Write:
Reserved
Read:
Write:
PBCTL
Read:
Write:
PBFLG
Read:
Write:
PA3H
Read:
Write:
PA2H
Read:
Write:
PA1H
Read:
Write:
PA0H
Read:
Write:
MCCNT (hi)
Read:
Write:
MCCNT (lo)
Read:
Write:
TC0H (hi)
Read:
Write:
TC0H (lo)
Read:
Write:
Bit 7
MCZI
MCZF
0
0
NOVW7
SH37
0
0
0
0
0
Bit 7
Bit 7
Bit 7
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
6
5
MODMC RDMCL
0
0
4
0
ICLAT
0
3
0
FLMC
POLF3
2
1
MCEN
POLF2
MCPR1
POLF1
0
0
0
PA3EN PA2EN PA1EN
0
0
0
0
0
DLY1
NOVW6 NOVW5 NOVW4 NOVW3 NOVW2 NOVW1
SH26
0
SH15
0
SH04
0
TFMOD
0
PACMX
0
BUFEN
0
Reads to this register return unpredictable values
0
0
0
0
0
0
0
0
0
0
0
0
PBEN
0
0
0
0
PBOVI
0
0
0
0
0
PBOVF
6
5
4
3
2
1
6
5
4
3
2
1
6
5
4
3
2
1
6
5
4
3
2
1
14
13
12
11
10
9
6
5
4
3
2
1
14
13
12
11
10
9
6
5
4
3
2
1
Bit 0
Address
Offset
MCPR0 $0066
POLF0 _$0067
PA0EN $0068
DLY0 $0069
NOVW0 $006A
LATQ
0
$006B ⁽⁴⁾
$006C
$006D ⁽²⁾
0
$006E
0
$006F
0
$0070
0
$0071
Bit 0 _{$0072 (5)}
Bit 0 _{$0073 (5)}
Bit 0 _{$0074 (5)}
Bit 0 _{$0075 (5)}
Bit 8 $0076
Bit 0 $0077
Bit 8 _{$0078 (5)}
Bit 0 _{$0079 (5)}
= Unimplemented or reserved
Figure 68 Enhanced Capture Timer Register Map (Continued)
MOTOROLA
Enhanced Capture Timer (ECT)
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MC9S12T64Revision 1.1.1
377