MC9S12T64 Datasheet, PDF (352/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Pulse Width Modulator (PWM8B8C)
1 = change on PWM7IN input
0 = No change on PWM7IN input.
PWMIE — PWM Interrupt Enable
If interrupt is enabled an interrupt to the CPU is asserted.
1 = PWM interrupt is enabled.
0 = PWM interrupt is disabled.
PWMRSTRT — PWM Restart.
The PWM can only be restarted if the PWM channel input 7 is
de-asserted. After writing a ‘1’ to the PWMRSTRT bit (trigger event)
the PWM channels start running after the corresponding counter
passes next ‘counter == 0’ phase.
Also if the PWM7ENA bit is reset to 0, the PWM do not start before
the counter passes $00.
The bit is always read as ‘0’.
PWMLVL — PWM shutdown output Level.
If active level as defined by the PWM7IN input, gets asserted all
enabled PWM channels are immediately driven to the level defined by
PWMLVL.
1 = PWM outputs are forced to 1.
0 = PWM outputs are forced to 0
PWM7IN — PWM channel 7 input status.
This reflects the current status of the PWM7 pin.
PWM7INL — PWM shutdown active input level for ch. 7.
If the emergency shutdown feature is enabled (PWM7ENA = 1), this
bit determines the active level of the PWM7channel.
1 = Active level is high
0 = Active level is low
PWM7ENA — PWM emergency shutdown Enable
If this bit is ‘1’ the pin associated with channel 7 is forced to input and
the emergency shutdown feature is enabled.All the other bits in this
register are meaningful only if PWM7ENA = 1.
1 = PWM emergency feature is enabled.
0 = PWM emergency feature disabled.
MC9S12T64Revision 1.1.1
352
Pulse Width Modulator (PWM8B8C)
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