MC9S12T64 Datasheet, PDF (598/608 Pages) Motorola, Inc – Specification

Glossary
Freescale Semiconductor, Inc.
CPU registers — Memory locations that are wired directly into the CPU logic instead of being
part of the addressable memory map. The CPU always has direct access to the
information in these registers. The CPU registers in an M68HC12 are:
• A (8-bit accumulator)
• B (8-bit accumulator)
– D (16-bit accumulator formed by concatenation of accumulators A and B)
• IX (16-bit index register)
• IY (16-bit index register)
• SP (16-bit stack pointer)
• PC (16-bit program counter)
• CCR (8-bit condition code register)
cycle time — The period of the operating frequency: t_CYC = 1/f_OP.
D — See “accumulators (A and B or D).”
decimal number system — Base 10 numbering system that uses the digits zero through nine.
duty cycle — A ratio of the amount of time the signal is on versus the time it is off. Duty cycle is
usually represented by a percentage.
ECT — See “enhanced capture timer.”
EEPROM — Electrically erasable, programmable, read-only memory. A nonvolatile type of
memory that can be electrically erased and reprogrammed.
EPROM — Erasable, programmable, read-only memory. A nonvolatile type of memory that can
be erased by exposure to an ultraviolet light source and then reprogrammed.
enhanced capture timer (ECT) — The HC12 Enhanced Capture Timer module has the features
of the HC12 Standard Timer module enhanced by additional features in order to enlarge
the field of applications.
exception — An event such as an interrupt or a reset that stops the sequential execution of the
instructions in the main program.
fetch — To copy data from a memory location into the accumulator.
firmware — Instructions and data programmed into nonvolatile memory.
MC9S12T64Revision 1.1.1
598
Glossary
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