MC9S12T64 Datasheet, PDF (545/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Fast Background Debug Module (FBDM)
Functional Description
The tag follows program information as it advances through the
instruction queue. When a tagged instruction reaches the head of the
queue, the CPU enters active BDM rather than executing the instruction.
NOTE: Tagging is disabled when BDM becomes active and BDM serial
commands are not processed while tagging is active.
Executing the BDM TAGGO command configures two MCU pins for
tagging. On MCUs with an [Muxed] External Bus Interface (MEBI or
EBI), the TAGLO signal shares a pin with the LSTRB signal, and the
TAGHI signal shares a pin with the BKGD signal. On MCUs with a
Development Tools Interface (DTI), TAGLO will generally be bonded out
separately.
WARNING:
If tagging is used in SPI mode, the BKGD pin needs to be brought
to a high level soon after the taggo command is sent. Since the
BKGD pin is used for TAGHI, it must be high within 15 target cycles,
or the next instruction may get tagged.
Table 101 shows the functions of the two tagging pins. The pins operate
independently, that is, the state of one pin does not affect the function of
the other. The presence of logic level 0 on either pin at the fall of the
external clock (ECLK) performs the indicated function. High tagging is
allowed in all modes. On MCUs with a [Muxed] External Bus Interface
(MEBI or EBI), low tagging is allowed only when low strobe is enabled
(LSTRB is allowed only in wide expanded modes and emulation
expanded narrow mode). On MCUs with a Development Tools Interface
(DTI), low tagging is allowed in all modes.
Table 101 Tag Pin Function
TAGHI
1
1
0
0
TAGLO
1
0
1
0
Tag
No tag
Low byte
High byte
Both bytes
MOTOROLA
Fast Background Debug Module (FBDM)
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MC9S12T64Revision 1.1.1
545