MC9S12T64 Datasheet, PDF (421/608 Pages) Motorola, Inc – Specification

Stop Mode
Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
Block Diagram
• If SCISWAI is set, SCI clock generation ceases and the SCI
module enters a power-conservation state when the CPU is in wait
mode. Setting SCISWAI does not affect the state of the receiver
enable bit, RE, or the transmitter enable bit, TE.
If SCISWAI is set, any transmission or reception in progress stops
at wait mode entry. The transmission or reception resumes when
either an internal or external interrupt brings the CPU out of wait
mode. Exiting wait mode by reset aborts any transmission or
reception in progress and resets the SCI.
The SCI is inactive during stop mode for reduced power consumption.
The STOP instruction does not affect the SCI register states, but the bus
clock will be disabled. The SCI operation resumes from where it left off
after an external interrupt brings the CPU out of stop mode. Exiting stop
mode by reset aborts any transmission or reception in progress and
resets the SCI.
Block Diagram
Figure 74 is a block diagram of the SCI.
MOTOROLA
Serial Communications Interface (SCI)
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MC9S12T64Revision 1.1.1
421