MC9S12T64 Datasheet, PDF (485/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
Interrupts
Interrupt sources
Mode Fault
Transfer Complete
SPI Transmitter
Empty
Table 85 SPI Interrupt Signals
Vector Address
$FFD8, $FFD9
Description
Active high detect. MODF occurs when a logic
zero occurs on the SS pin of a master SPI
Active high detect. SPIF occurs after the last
SCK cycle in a data transfer operation to
indicate that the transfer is complete.
Active high detect. SPTEF occurs when the SPI
data register transfers a byte into the Transmit
shift register.
Description of
Interrupt
Operation
The Serial Peripheral Interface only originates interrupt requests. The
following is a description of how the Serial Peripheral Interface makes a
request and how the MCU should acknowledge that request.
MODF Description
MODF occurs when the master detects an error on the SS pin. The
master SPI must be configured for the MODF feature (see Table 81).
Once MODF is set, the current transfer is halted and the following bit is
changed:
• MSTR=0, The master bit in SPICR1 resets.
The MODF interrupt is reflected in the status register MODF flag.
Clearing the flag will also clear the interrupt. This interrupt will stay active
while the MODF flag is set. MODF has an automatic clearing process
which is described in SPI Status Register (SPISR).
SPIF Description
SPIF occurs when the SPI receives/transmits the last SCK edge in a
data transfer operation. Once SPIF is set, it does not clear until it is
serviced. SPIF has an automatic clearing process which is described in
SPI Status Register (SPISR). In the event that the SPIF is not serviced
before the end of the next transfer (i.e. SPIF remains active throughout
another transfer), the latter transfers will be ignored and no new data will
be copied into the SPIDR.
SPTEF Description
MOTOROLA
SPTEF occurs when the SPI Data register transfers a byte into the
transmit buffer Once SPTEF is set, it does not clear until it is serviced.
Serial Peripheral Interface (SPI)
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MC9S12T64Revision 1.1.1
485