MC9S12T64 Datasheet, PDF (190/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Low-Voltage Detector (LVD)
LVD Status Register
(LVDSR)
Address Offset: $00FA
Bit 7
6
5
4
3
2
1
0
Read:
0
0
0
0
0
0
0
LVDF
Write:
Power-On
Reset:
0 ⁽¹⁾
0
0
0
0
0
0
0
= Unimplemented or reserved
1. LVDF is cleared when a power on reset (POR) occurs. Unaffected by non-POR resets.
Read anytime. Write anytime.
LVDF — Low Voltage Detection Flag
The LVDF flag indicates the low voltage detect status when LVDE is
set. The LVDF flag is cleared when a power on reset (POR) occurred.
The LVDF flag is set when the VDDR voltage falls below the V_LVR
voltage for 17 bus clock cycles (refer to Table 34). Unaffected by
non-POR resets. This flag can only be cleared by writing a 1. Writing
a 0 has no effect.
1 = Low voltage has been detected.
0 = Low voltage has not been detected.
Table 34 LVDF Flag Indication
At Level
VDDR > V_LVRR
VDDR
For Number of Bus Clock
Cycles
Any
< 16 Bus Clock Cycles
VDDR ≤ V_LVR
Between 16 and 17 Bus Clock
Cycles
V_LVR < VDDR < V_LVRR
> 17 Bus Clock Cycles
Any
LVDF
Keeps Previous Value
Keeps Previous Value
Keeps Previous Value
Or
Becomes “1”
Becomes “1”
Keeps Previous Value
MC9S12T64Revision 1.1.1
190
Low-Voltage Detector (LVD)
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