MC9S12T64 Datasheet, PDF (482/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
The bidirectional mode does not affect SCK and SS functions.
Error Conditions
The SPI has one error condition
• Mode fault error
Mode Fault Error
If the SS input becomes low while the SPI is configured as a master, it
indicates a system error where more than one master may be trying to
drive the MOSI and SCK lines simultaneously. This condition is not
permitted in normal operation; the MODF bit in the SPI status register is
set automatically provided the MODFEN bit is set.
In the special case where the MODFEN bit is cleared, the SS pin is a
general purpose input/output pin for the SPI system configured in master
mode. In this special case, the mode error function is inhibited and
MODF remains cleared. In case the SPI system is configured as a slave,
the SS pin is a dedicated input pin. Mode fault error doesn’t occur in
slave mode.
When a mode fault error occurs, the MSTR bit in control register SPICR1
is cleared, MODF bit in the status register is set and the output enable
for the SCK, MISO and MOSI pins are de-asserted. So SCK, MISO and
MOSI pins are forced to be high impedance inputs to avoid any
possibility of conflict with another output driver.
NOTE: There is an errata information about the mode fault behavior. See
MC9S12T64 Errata Sheet for details.
If the mode fault error occurs in the bidirectional mode for a SPI system
configured in master mode, output enable of the MOMI (MOSI in
bidirectional mode) is cleared if it was set but MISO (SISO) is not
affected. No mode fault error occurs in the bidirectional mode for SPI
system configured in slave mode.
The mode fault flag is cleared automatically by a read of the SPI status
register (with MODF set) followed by a write to SPI control register 1.
MC9S12T64Revision 1.1.1
482
Serial Peripheral Interface (SPI)
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