MC9S12T64 Datasheet, PDF (279/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Clocks and Reset Generator (CRG)
Register Map
Register Map
The register map for the CRG appears below.
Register
Name
SYNR
Bit 7
Read: 0
Write:
6
5
4
3
2
1
Bit 0
Address
offset
0
SYN5 SYN4 SYN3 SYN2 SYN1 SYN0 $0034
Read: 0
0
0
0
REFDV
REFDV3 REFDV2 REFDV1 REFDV0 $0035
Write:
Reserved for
Factory Test
Read:
Write:
Reads to this register return unpredictable values
$0036
Read:
0
CRGFLG
RTIF PORLVDRF
Write:
LOCK TRACK
SCM
LOCKIF
SCMIF
$0037
Read:
0
CRGINT
RTIE
Write:
0
0
LOCKIE
0
0
SCMIE
$0038
CLKSEL
Read:
PLLSEL
Write:
PSTP
SYSWAI ROAWAI PLLWAI CWAI RTIWAI COPWAI $0039
Read:
0
PLLCTL
CME PLLON AUTO ACQ
PRE
PCE SCME $003A
Write:
Read: 0
RTICTL
Write:
RTR6
RTR5 RTR4 RTR3 RTR2 RTR1 RTR0 $003B
Read:
0
0
0
COPCTL
WCOP RSBCK
CR2
CR1
CR0 $003C
Write:
Reserved for
Factory Test
Read:
Write:
Reads to this register return unpredictable values
$003D
= Reserved or unimplemented
Figure 45 CRG Register Map
MOTOROLA
Clocks and Reset Generator (CRG)
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MC9S12T64Revision 1.1.1
279