MC9S12T64 Datasheet, PDF (427/608 Pages) Motorola, Inc – Specification

Freescale Semiconductor, Inc.
Serial Communications Interface (SCI)
Register Descriptions
PE — Parity Enable Bit
PE enables the parity function. When enabled, the parity function
inserts a parity bit in the most significant bit position.
1 = Parity function enabled
0 = Parity function disabled
PT — Parity Type Bit
PT determines whether the SCI generates and checks for even parity
or odd parity. With even parity, an even number of 1s clears the parity
bit and an odd number of 1s sets the parity bit. With odd parity, an odd
number of 1s clears the parity bit and an even number of 1s sets the
parity bit.
1 = Odd parity
0 = Even parity
SCI Control
Register 2
(SCIxCR2)
Where: x = 0 for SCI0, or 1 for SCI1
Address Offset: $00CB (SCI0CR2), $00D3 (SCI1CR2)
Bit 7
6
5
4
3
2
Read:
TIE
TCIE
RIE
ILIE
TE
RE
Write:
Reset:
0
0
0
0
0
0
1
RWU
0
Bit 0
SBK
0
= Unimplemented or Reserved
Read: anytime
Write: anytime
TIE — Transmitter Interrupt Enable Bit
TIE enables the transmit data register empty flag, TDRE, to generate
interrupt requests.
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
MOTOROLA
Serial Communications Interface (SCI)
For More Information On This Product,
Go to: www.freescale.com
MC9S12T64Revision 1.1.1
427