MC68HC908EY16 Datasheet, PDF (84/278 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
8.3.3.2 External Clock Input Path
The external clock input path is the means by which the microcontroller uses an external clock source.
The input to the path is the PTC4/OSC1 pin and the output is the external clock (ECLK). The path, which
contains input buffering, is enabled when the external clock generator enable signal (ECGEN) is set.
When not enabled, the PTC4/OSC1 pin reverts to its port function.
8.3.4 Clock Monitor Circuit
The ICG contains a clock monitor circuit which, when enabled, will continuously monitor both the external
clock (ECLK) and the internal clock (ICLK) to determine if either clock source has been corrupted. The
clock monitor circuit, shown in Figure 8-5, contains these blocks:
• Clock monitor reference generator
• Internal clock activity detector
• External clock activity detector
CMON
FICGS
IBASE
ICGEN
CMON
FICGS
IBASE
ICGEN
ICLK
ACTIVITY
DETECTOR
EREF
IOFF
ICGS
IOFF
ICGS
EXTXTALEN
EXTSLOW
IBASE
ICGON
EREF
EXTXTALEN
EXTSLOW
ECGS
REFERENCE
GENERATOR
ECLK
ECGEN
ESTBCLK
IREF
ECGEN
ECLK
ESTBCLK
IREF
ECGEN
ECLK
ECLK
ACTIVITY
DETECTOR
ECGS
CMON
EOFF
ECGS
EOFF
NAME
CONFIGURATION REGISTER BIT
NAME
REGISTER BIT
NAME
TOP LEVEL SIGNAL
NAME
Figure 8-5. Clock Monitor Block Diagram
MODULE SIGNAL
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
84
Freescale Semiconductor