MC68HC908EY16 Datasheet, PDF (25/278 Pages) Motorola, Inc – Microcontrollers

Chapter 2
Memory
2.1 Introduction
The M68HC08 central processor unit (CPU08) can address 64 Kbytes of memory space. The memory
map, shown in Figure 2-1, includes:
• 16 Kbytes of FLASH memory, 15, 872 bytes of user space
• 512 bytes of random-access memory (RAM)
• 36 bytes of user-defined vectors
• 310 bytes of monitor routines in read-only memory (ROM)
• 1024 bytes of integrated FLASH burn-in routines in ROM
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map
(Figure 2-1) and in register figures in this document, unimplemented locations are shaded.
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller unit (MCU) operation. In
the Figure 2-1 and in register figures in this document, reserved locations are marked with the word
reserved or with the letter R.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$003F. Additional I/O
registers have these addresses:
• $FE00; SIM break status register, SBSR
• $FE01; SIM reset status register, SRSR
• $FE03; SIM break flag control register, SBFCR
• $FE08; FLASH control register, FLCR
• $FE09; break address register high, BRKH
• $FE0A; break address register low, BRKL
• $FE0B; break status and control register, BRKSCR
• $FE0C; LVI status register, LVISR
• $FF7E; FLASH block protect register, FLBPR
• $FF80; ICG trim value (optional), ICGT
Data registers are shown in Figure 2-2. and Table 2-1 is a list of vector locations.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
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