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MC68HC908EY16 Datasheet, PDF (45/278 Pages) Motorola, Inc – Microcontrollers
INTERNAL
DATA BUS
Functional Description
READ PTB
ADC DATA REGISTERS
PTB
ADC CHANNEL x
DISABLE
INTERRUPT
LOGIC
CONVERSION
COMPLETE
ADC
ADC VOLTAGE IN
ADVIN
CHANNEL
SELECT
ADCH[4:0]
AIEN
COCO/IDMAS
ADC CLOCK
PTx
CGMXCLK
BUS CLOCK
CLOCK
GENERATOR
ADIV[2:0]
ADICLK
Figure 3-2. ADC Block Diagram
3.3.1 ADC Port I/O Pins
PTB7:PTB0 are general-purpose I/O pins that are shared with the ADC channels. See Chapter 12
Input/Output (I/O) Ports (PORTS).
The channel select bits define which ADC channel/port pin will be used as the input signal. The ADC
overrides the port logic when that port is selected by the ADC multiplexer. The remaining ADC
channels/port pins are controlled by the port logic and can be used as general-purpose input/output (I/O)
pins. Writes to the port register or DDR will not have any effect on the port pin that is selected by the ADC.
Read of a port pin which is in use by the ADC will return a logic 0.
3.3.2 Voltage Conversion
When the input voltage to the ADC equals VREFH, the ADC converts the signal to $3FF (full scale). If the
input voltage equals VREFL, the ADC converts it to $000. Input voltages between VREFH and VREFL are
straight-line linear conversions. All other input voltages will result in $3FF if greater than VREFH and $000
if less than VREFL.
NOTE
Input voltage should not exceed the analog supply voltages. See 20.10
Analog-to-Digital Converter (ADC) Characteristics.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
45