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MC68HC908EY16 Datasheet, PDF (49/278 Pages) Motorola, Inc – Microcontrollers
I/O Registers
3.6.6.1 VREFH and VREFL
Both ac and dc current are drawn through the VREFH and VREFL loop. The AC current is in the form of
current spikes required to supply charge to the capacitor array at each successive approximation step.
The current flows through the internal resistor string. The best external component to meet both these
current demands is a capacitor in the 0.01 µF to 1 µF range with good high frequency characteristics. This
capacitor is connected between VREFH and VREFL and must be placed as close as possible to the
package pins. Resistance in the path is not recommended because the dc current will cause a voltage
drop which could result in conversion errors.
3.6.6.2 ANx
Empirical data shows that capacitors from the analog inputs to VREFL improve ADC performance. 0.01-µF
and 0.1-µF capacitors with good high-frequency characteristics are sufficient. These capacitors must be
placed as close as possible to the package pins.
3.6.6.3 Grounding
In cases where separate power supplies are used for analog and digital power, the ground connection
between these supplies should be at the VSSA pin. This should be the only ground connection between
these supplies if possible. The VSSA pin makes a good single point ground location. Connect the VREFL
pin to the same potential as VSSA at the single point ground location.
3.7 I/O Registers
These I/O registers control and monitor operation of the ADC:
• ADC status and control register, ADSCR
• ADC data registers, ADRH and ARDL
• ADC clock register, ADCLK
3.7.1 ADC Status and Control Register
This section describes the function of the ADC status and control register (ADSCR). Writing ADSCR
aborts the current conversion and initiates a new conversion.
Address:
Read:
Write:
Reset:
$003C
Bit 7
6
5
4
3
2
1
COCO
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
0
0
0
1
1
1
1
Figure 3-4. ADC Status and Control Register (ADSCR)
Bit 0
ADCH0
1
COCO — Conversions Complete Bit
When AIEN bit is 0, the COCO is a read-only bit which is set each time a conversion is completed
except in the continuous conversion mode where it is set after the first conversion. This bit is cleared
whenever the ADC status and control register is written or whenever the ADC data register is read.
If AIEN bit is 1, the COCO is a read/write bit. Reset clears this bit.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0)/CPU interrupt (AIEN = 1)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
49