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MC68HC908EY16 Datasheet, PDF (41/278 Pages) Motorola, Inc – Microcontrollers
FLASH Memory (FLASH)
2.6.5 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made for protecting a block of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using the FLASH block protect register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be protected. The range
of the protected area starts from a location defined by FLBPR and ends at the bottom of the FLASH
memory ($FFFF). When the memory is protected, the HVEN bit cannot be set in either erase or program
operations.
NOTE
In performing a program or erase operation, FLBPR must be read after
setting the PGM or ERASE bit and before asserting the HVEN bit.
When FLBPR is programmed with all 0s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory address ranges as shown in
2.6.6 FLASH Block Protect Register. Once the FLBPR is programmed with a value other than $FF or $FE,
any erase or program of the FLBPR or the protected block of FLASH memory is prohibited. Mass erase
is disabled whenever any block is protected (FLBPR does not equal $FF). The presence of a VTST on the
IRQ pin will bypass the block protection so that all of the memory included in the block protect register is
open for program and erase operations.
2.6.6 FLASH Block Protect Register
The FLASH block protect register (FLBPR) is implemented as a byte within the FLASH memory, and
therefore can be written only during a programming sequence of the FLASH memory. The value in this
register determines the starting location of the protected range within the FLASH memory.
Address: $FF7E
Bit 7
6
5
4
3
2
1
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset:
Unaffected by reset. Initial value from factory is $FF.
Write to this register is by a programming sequence to the FLASH memory.
Figure 2-5. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
BPR7–BPR0 — FLASH Block Protect Bits
These eight bits represent bits [13:6] of a 16-bit memory address. Bit 15 and Bit 14 are 1s and bits [5:0]
are 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be $XX00, $XX40, $XX80, and $XXC0 (64 bytes
page boundaries) within the FLASH memory.
START ADDRESS OF FLASH
BLOCK PROTECT
1
1
16-BIT MEMORY ADDRESS
FLBPR VALUE
000000
Figure 2-6. FLASH Block Protect Start Address
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
41