MC68HC908EY16 Datasheet, PDF (274/278 Pages) Motorola, Inc – Microcontrollers

Revision History
Section
Enhanced Serial
Communications
Interface (ESCI)
Module
Timer Interface A
(TIMA) Module
Timer Interface B
(TIMB) Module
Analog-to-Digital
Converter (ADC)
Module
Input/Output (I/O) Ports
Preliminary Electrical
Specifications
Page (in Rev 0.4)
210
238
243 and 244
279 – 301
303 – 326
345
354
355
361 – 376
366
382 and 384
382 and 384
382 and 384
386
391
Description of change
Note added regarding length of break character when followed by an idle.
Prescale bits renamed
ACLK = 0 description changed
Several updates for clarification
Several updates for clarification
Reserved register bits redefined as unimplemented
Table 20-1 updated to show all unused combinations
Left Justified Mode description corrected
Reserved register bits redefined as unimplemented
Port B description updated
Changes to:
Hi-Z leakage current
Input current
Monitor mode entry voltage
External clock frequency of operation
FLASH page erase time
Changes from Rev 0.2 published on 1 August 2001 to Rev 0.3 published
on 6 September 2001
Section
Memory Map
Configuration Registers
(CONFIG1 &
CONFIG2)
Low-Voltage Inhibit
(LVI) Module
Timer Interface A
(TIMA) Module
Timer Interface B
(TIMB) Module
Timebase Module
(TBM)
Analog-to-Digital
Converter (ADC)
Module
Preliminary Electrical
Specifications
Page (in Rev 0.3)
50
150
152
188
189
190
191
Description of change
$001E TMBCLKSEL and SSBPUENB bits added
$001E TMBCLKSEL and SSBPUENB bits added
Corrections to Table 8-1: PTB6 to PTC4 and PTB7 to PTC3
Figure 12-1 updated, digital filter removed
False reset protection text updated
Table 12-1 updated
References to digital filter removed
280
External clock input removed from features
304
336
337
338
345
347
384 and 386
388 and 392
391
External clock input removed from features
Divide-by-128 replaced by divide-by-1024
Figure 19-1 updated
Note added after Table 19-1
PTC and Cx removed from Figure 20-1
ADCR changed to ADCLK
Control Timing specifications added
SPI characteristics added
FLASH read bus clock frequency changed to 8 MHz
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
274
Freescale Semiconductor