MC68HC908EY16 Datasheet, PDF (26/278 Pages) Motorola, Inc – Microcontrollers

Memory
$0000
↓
$003F
$0040
↓
$023F
$0240
↓
$0FFF
$1000
↓
$13FF
$1400
↓
$BFFF
$C000
↓
$FDFF
$FE00
$FE01
$FE02
$FE03
$FE04
$FE05
$FE06
$FE07
$FE08
I/O Registers
64 Bytes
$FE09
$FE0A
$FE0B
Break Address Register High (BRKH)
Break Address Register Low (BRKL)
Break Status and Control Register (BRKSCR)
RAM
512 Bytes
Unimplemented
3520 Bytes
Reserved for Integrated FLASH Burn-in Routines
1024 Bytes
$FE0C
$FE0D
↓
$FE0F
$FE10
↓
$FE1F
$FE20
↓
LVI Status Register (LVISR)
Reserved
3 Bytes
Reserved
16 Bytes
Reserved for Compatibility with Monitor Code
for A-Family Parts
Monitor ROM 310 Bytes
Unimplemented
44,032 Bytes
FLASH Memory
15,872 Bytes
FF55
FF56
↓
FF7D
$FF7E
$FF80
Unimplemented
40 Bytes
FLASH Block Protect Register (FLBPR)
ICG Trim Value (Optional) (ICGT)
SIM Break Status Register (SBSR)
SIM Reset Status Register (SRSR)
Reserved
$FF7F
↓
$FFDB
Unimplemented
93 Bytes
SIM Break Flag Control Register (SBFCR)
RESERVED
RESERVED
$FFDC
↓
$FFFF
FLASH Vectors
36 Bytes
RESERVED
Reserved for FLASH Test Control Register (FLTCR)
Note:
Locations $FFF6–$FFFD are reserved for eight
security bytes.
FLASH Control Register (FLCR)
Figure 2-1. Memory Map
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
26
Freescale Semiconductor