MC68HC908EY16 Datasheet, PDF (123/278 Pages) Motorola, Inc – Microcontrollers

Port E
PTE[1:0] — Port E Data Bits
These read/write bits are software programmable. Data direction of each port E pin is under the control
of the corresponding bit in data direction register E. Reset has no effect on PTE[1:0].
RxD — SCI Receive Data Input Bit
The PTE1/RxD pin is the receive data input for the SCI module. When the enable SCI bit, ENSCI, is
clear, the SCI module is disabled, and the PTE1/RxD pin is available for general-purpose I/O. See
13.8.1 ESCI Control Register 1.
TxD — SCI Transmit Data Output
The PTE0/TxD pin is the transmit data output for the SCI module. When the enable SCI bit, ENSCI, is
clear, the SCI module is disabled, and the PTE0/TxD pin is available for general-purpose I/O. See
13.8.1 ESCI Control Register 1.
NOTE
Data direction register E (DDRE) does not affect the data direction of port
E pins that are being used by the ESCI. However, the DDRE bits always
determine whether reading port E returns the states of the latches or the
states of the pins. See Table 12-5.
12.6.2 Data Direction Register E
Data direction register E determines whether each port E pin is an input or an output. Writing a 1 to a
DDRE bit enables the output buffer for the corresponding port E pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$000A
Bit 7
6
5
4
3
2
1
0
0
0
0
0
0
DDRE1
0
0
0
0
0
0
0
= Unimplemented
Figure 12-14. Data Direction Register E (DDRE)
Bit 0
DDRE0
0
DDRE[1:0] — Data Direction Register E Bits
These read/write bits control port E data direction. Reset clears DDRE[1:0], configuring all port E pins
as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
NOTE
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
123