MC68HC908EY16 Datasheet, PDF (156/278 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
STOP/WAIT
CONTROL
SIM
COUNTER
÷2
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO ICG)
COP CLOCK
CGMXCLK (FROM ICG)
CGMOUT (FROM ICG)
CLOCK
CONTROL
CLOCK GENERATORS
POR CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
RESET
INTERNAL CLOCKS
FORCED MON MODE ENTRY
(FROM MENRST MODULE)
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT CONTROL
AND PRIORITY DECODE
INTERRUPT SOURCES
CPU INTERFACE
Figure 14-1. SIM Block Diagram
ECLK
ICLK
ICG
GENERATOR
CLOCK
SELECT
CIRCUIT
÷2
CS
CGMXCLK
A
CGMOUT
B _S*
*WHEN S = 1,
CGMOUT = B
SIM COUNTER
÷2
BUS CLOCK
GENERATORS
SIM
MONITOR MODE
USER MODE
ICG
Figure 14-2. System Clock Signals
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
156
Freescale Semiconductor