MC68HC908EY16 Datasheet, PDF (166/278 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
CPUSTOP
IAB
STOP ADDR
STOP ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
Note: Previous data can be operand data or the STOP opcode, depending on the last instruction.
Figure 14-14. Stop Mode Entry Timing
CGMXCLK
STOP RECOVERY PERIOD
INT
IAB
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
SP – 2
SP – 3
Figure 14-15. Stop Mode Recovery from Interrupt
14.7 SIM Registers
The SIM has three memory mapped registers. Table 14-3 shows the mapping of these registers.
Table 14-3. SIM Registers
Address
$FE00
$FE01
$FE03
Register
SBSR
SRSR
SBFCR
Access Mode
User
User
User
14.7.1 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from stop or
wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Note: 1. Writing a 0 clears SBSW
Figure 14-16. SIM Break Status Register (SBSR)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
166
Freescale Semiconductor