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MC68HC908EY16 Datasheet, PDF (108/278 Pages) Motorola, Inc – Microcontrollers
Keyboard Interrupt (KBD) Module
10.4 Keyboard Initialization
When a keyboard interrupt pin is enabled, it takes time for the internal pullup to reach a logic 1. Therefore,
a false interrupt can occur as soon as the pin is enabled.
To prevent a false interrupt on keyboard initialization:
1. Mask keyboard interrupts by setting the IMASKK bit in the keyboard status and control register
2. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register
3. Write to the ACKK bit in the keyboard status and control register to clear any false interrupts
4. Clear the IMASKK bit.
An interrupt signal on an edge-triggered pin can be acknowledged immediately after enabling the pin. An
interrupt signal on an edge- and level-triggered interrupt pin must be acknowledged after a delay that
depends on the external load.
Another way to avoid a false interrupt:
1. Configure the keyboard pins as outputs by setting the appropriate DDRA bits in data direction
register A.
2. Write 1s to the appropriate port A data register bits.
3. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.
10.5 Low-Power Modes
The WAIT and STOP instructions put the microcontroller unit (MCU) in low power-consumption standby
modes.
10.5.1 Wait Mode
The keyboard module remains active in wait mode. Clearing the IMASKK bit in the keyboard status and
control register enables keyboard interrupt requests to bring the MCU out of wait mode.
10.5.2 Stop Mode
The keyboard module remains active in stop mode. Clearing the IMASKK bit in the keyboard status and
control register enables keyboard interrupt requests to bring the MCU out of stop mode.
10.6 Keyboard Module During Break Interrupts
The BCFE bit in the break flag control register (SBFCR) enables software to clear status bits during the
break state.
To allow software to clear the KEYF bit during a break interrupt, write a 1 to the BCFE bit. If KEYF is
cleared during the break state, it remains cleared when the MCU exits the break state.
To protect the KEYF bit during the break state, write a 0 to the BCFE bit. With BCFE at 0, writing to the
keyboard acknowledge bit (ACKK) in the keyboard status and control register during the break state has
no effect. See 10.7.1 Keyboard Status and Control Register.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
108
Freescale Semiconductor