MC68HC908EY16 Datasheet, PDF (24/278 Pages) Motorola, Inc – Microcontrollers

General Description
1.5.6 Port A I/O Pins (PTA6/SS, PTA5/SPSCK, PTA4/KBD4–PTA0/KBD0)
Port A input/output (I/O) pins (PTA6/SS, PTA5/SPSCK, PTA4/KBD4, PTA3/KBD3, PTA2/KBD2,
PTA1/KBD1, and PTA0/KBD0) are special-function, bidirectional I/O port pins. PTA5 and PTA6 are
shared with the serial peripheral interface (SPI). PTA4-PTA0 can be programmed to serve as keyboard
interrupt pins.
See Chapter 12 Input/Output (I/O) Ports (PORTS) and Chapter 9 External Interrupt (IRQ).
1.5.7 Port B I/O Pins (PTB7/AD7/TBCH1, PTB6/AD6/TBCH0, PTB5/AD5–PTB0/AD0)
PTB7/AD7/TBCH1, PTB6/AD6/TBCH0, and PTB5/AD5–PTB0/AD0 are special-function, bidirectional I/O
port pins that can also be used for ADC inputs. PTB7/AD7/TBCH1 and PTB6/AD6/TBCH0 are special
function bidirectional I/O port pins that can also be used for timer interface pins.
See and Chapter 3 Analog-to-Digital Converter (ADC) Module and Chapter 17 Timer Interface A (TIMA)
Module.
1.5.8 Port C I/O Pins (PTC4/OSC1, PTC3/OSC2, PTC2/MCLK, PTC1/MOSI, PTC0/MISO)
PTC4/OSC1–PTC0/MISO are special-function, bidirectional I/O port pins. See Chapter 12 Input/Output
(I/O) Ports (PORTS). PTC3/OSC2 and PTC4/OSC1 are shared with the on-chip oscillator circuit through
configuration options. See Chapter 8 Internal Clock Generator (ICG) Module.
When applications require:
• PTC3/OSC2 can be programmed to be OSC2
• PTC4/OSC1 can be programmed to be OSC1
PTC2/MCLK is software selectable to be MCLK, or bus clock out. PTC1/MOSI can be programmed to be
the MOSI signal for the SPI. PTC0/MISO can be programmed to be the MISO signal for the SPI.
1.5.9 Port D I/O Pins (PTD1/TACH1–PTD0/TACH0)
PTD1/TACH1–PTD0/TACH0 are special-function, bidirectional I/O port pins that can also be programmed
to be timer pins.
See Chapter 17 Timer Interface A (TIMA) Module and Chapter 12 Input/Output (I/O) Ports (PORTS).
1.5.10 Port E I/O Pins (PTE1/RxD–PTE0/TxD)
PTE1/RxD–PTE0/TxD are special-function, bidirectional I/O port pins that can also be programmed to be
enhanced serial communication interface (ESCI) pins.
See Chapter 13 Enhanced Serial Communications Interface (ESCI) Module and Chapter 12 Input/Output
(I/O) Ports (PORTS).
NOTE
Any unused inputs and I/O ports should be tied to an appropriate logic level
(either V_DD or V_SS). Although the I/O ports of the MC68HC908EY16 do not
require termination, termination is recommended to reduce the possibility
of electro-static discharge damage.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
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Freescale Semiconductor