MC68HC908EY16 Datasheet, PDF (235/278 Pages) Motorola, Inc – Microcontrollers

Monitor Module (MON)
With V_SS on IRQ at the monitor entry, the ICG is on. In this case, the bus frequency is a nominal 1.6 MHz
and the baud rate is a nominal 6300.
When the forced monitor mode is entered the COP is always disabled regardless of the state of IRQ or
RST.
19.3.1.3 Monitor Vectors
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 19-2 summarizes the differences between user mode and monitor mode.
Table 19-2. Mode Differences
Modes
Reset
Vector High
Reset
Vector Low
Functions
Break
Break
Vector High Vector Low
SWI
Vector High
SWI
Vector Low
User
$FFFE
$FFFF
$FFFC
$FFFD
$FFFC
$FFFD
Monitor $FEFE
$FEFF
$FEFC
$FEFD
$FEFC
$FEFD
19.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
START
BIT BIT 0
BIT 1 BIT 2 BIT 3 BIT 4 BIT 5
NEXT
START
BIT 6 BIT 7 STOP BIT
BIT
Figure 19-12. Monitor Data Format
19.3.1.5 Break Signal
A start bit (0) followed by nine 0 bits is a break signal. When the monitor receives a break signal, it drives
the PTA0 pin high for the duration of approximately two bits and then echoes back the break signal.
MISSING STOP BIT
APPROXIMATELY 2 BITS DELAY
BEFORE ZERO ECHO
01234567
01234567
Figure 19-13. Break Transaction
19.3.1.6 Baud Rate
The communication baud rate is controlled by the crystal frequency or external clock and the state of the
PTB5 pin (when IRQ is set to V_TST) upon entry into monitor mode. If monitor mode was entered with V_DD
on IRQ and the reset vector blank, then the baud rate is independent of PTB5.
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
235